Workshop EMC3D
Thursday June 26 2008

The development of IC technology is driven by the need to increase performance and functionality while reducing size, power, and cost. In order to help the packaging industry to resolve those technical challenges, a new industrial consortium, called EMC3D, was organized on September 2006.
Through collaboration with research partners, the consortium aims at developing processes for creating micro vias between 5 and 30um on thinned 50um 200mm/300mm wafers using both via-first and via-last techniques.

The goal of EMC-3D symposium is to give state of the art on these technologies after 2 years running project. It aims at addressing the technical and cost issues of creating 3D interconnects using TSV technology for chip stacking and advanced MEMS/sensors packaging.

Confirmed speakers:

Fred ROOZEBOOM, NXP Semiconductors, Netherland
Paul SIBLERUD, Vice President, Semitool, USA
Yoon-Chul SOHN, Samsung Advanced Institute of Technology, Korea

Fees:

Registration


Contact: gilles.poupon@cea.fr